A flash memory is a non-volatile electrically erasable data storage device that evolved from electrically erasable programmable read-only memory (EEPROM). The two main types of flash memory are named after the logic gates that their storage cells resemble: NAND and NOR. NAND flash memory is commonly used in solid-state drives, which are supplanting magnetic disk drives in many applications. A NAND flash memory is commonly organized as multiple blocks, with each block having multiple pages. Each page comprises multiple cells. Each cell is capable of storing an electric charge. Cells can be used for storing data bits or for storing error-correcting code bits. A cell configured to store a single bit is known as a single-level cell (SLC). A cell configured to store two bits is known as a multi-level cell (MLC). In an MLC cell, one bit is commonly referred to as the least-significant bit (LSB), and the other as the most-significant bit (MSB). A cell configured to store three bits is known as a triple-level cell (TLC). Quad-Level-Cell (QLC) flash memories store four binary bits per physical cell, and have sixteen possible logic states and 16 voltage levels. Other flash types may have more binary bits per memory cell. Writing data to a flash memory is commonly referred to as “programming” the flash memory, due to the similarity to programming an EEPROM.
The electric charge stored in a cell can be detected in the form of a cell voltage. To read an SLC flash memory cell, the flash memory controller provides one or more reference voltages (also referred to as read voltages) to the flash memory device. Detection circuitry in the flash memory device will interpret the bit as a “0” if the cell voltage is greater than a reference voltage Vref and will interpret the bit as a “1” if the cell voltage is less than the reference voltage Vref. Thus, an SLC flash memory requires a single reference voltage Vref. In contrast, an MLC flash memory requires three such reference voltages, and a TLC flash memory requires seven such reference voltages. Thus, reading data from an MLC or TLC flash memory device requires that the controller provide multiple reference voltages having optimal values that allow the memory device to correctly detect the stored data values.
SLC flash technologies usually have a low read latency (e.g., time between a host sending a read command and eventually receiving the requested data) whereas MLC, TLC, and QLC flash technologies have higher read latencies due to the need to apply multiple voltage thresholds. The tradeoff of increased read latency is usually acceptable due to the increased memory density offered by the MLC, TLC, and QLC flash technologies as compared to SLC flash technologies. Unfortunately, more applications, such as enterprise data storage and cache flash appliances, are becoming more sensitive to read latency, but still require the lower price point associated with the MLC, TLC, and QLC flash technologies. If flash memory is to find a place in these types of applications, the read latency of the flash technologies needs to be improved.